GNRFET-Based Full Adder with Ultra-Low Leakage and High Speed

The design of full adder has always been considered by designers over the years and the main efforts in this field have been on low operating voltage, low-power consumption, high speed, low chip area and high energy efficiency. For this purpose, in this paper, graphene nano-ribbon field effect transistors (GNRFETs) that compete with conventional MOSFET technology due to their higher current drive capabilities, ballistic transport, lower power-delay product (PDP), and higher thermal stability, are used for designing a full adder. Based on the promising properties of GNRFETs, an ultra-low-leakage and low-voltage full adder cell with 18 transistors is proposed. The proposed design utilizes the unique features of MOSFET-like GNRFETs for high performance. The simulations were performed using Synopsys HSPICE with 16nm MOS-GNRFET technology and the simulation results show the superiority of the GNRFET-based design in terms of speed and PDP compared to conventional and modern structures even at 0.5V supply voltage.

Ultra-low leakage, 1-bit full adder, Graphene nano-ribbon field effect transistor (GNRFET), Power-delay product (PDP), Low-Voltage